When ion implantation is used in the fabrication of semiconductor devices, a problem can arise due to the accumulation of electrical charge at insulated locations over the surface of the semiconductor wafer being implanted. Excessive electrical charge at the surface of the semiconductor wafer can cause damage to the delicate structures being formed in the wafer, and can also have an effect on the implant process itself, especially when implanting ions at low energies.
It is therefore usual practice to provide arrangements for neutralizing charge build-up on the wafer surface during ion implantation. An arrangement for wafer neutralization during implantation is disclosed in U.S. Pat. No. 5,399,871. A guide tube is located in front of the wafer and the ion beam is directed through the guide tube to the wafer during implanting. A plasma generator associated with the guide tube provides a source of low energy electrons to the interior of the guide tube. In the case of the usual positive ion beam, electrostatic charge which can build up on the surface of the wafer being implanted is positive. The low energy electrons within the guide tube are attracted to any sites of positive electrostatic charge build up on the wafer surface, which are then neutralized.
Further developments in relation to charge neutralizing systems of the kind described above are disclosed in U.S. Pat. Nos. 6,101,536, 6,501,081 and U.S. Ser. No. 60/830,117, and these disclosures are incorporated herein in their entirety by reference. The neutralization system disclosed in these prior art documents is referred to in the art as a plasma flood system (PFS).